init commit
This commit is contained in:
176
STM32CubeIDE/Application/User/Core/syscalls.c
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176
STM32CubeIDE/Application/User/Core/syscalls.c
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@@ -0,0 +1,176 @@
|
||||
/**
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||||
******************************************************************************
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||||
* @file syscalls.c
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||||
* @author Auto-generated by STM32CubeIDE
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||||
* @brief STM32CubeIDE Minimal System calls file
|
||||
*
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||||
* For more information about which c-functions
|
||||
* need which of these lowlevel functions
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||||
* please consult the Newlib libc-manual
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||||
******************************************************************************
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||||
* @attention
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||||
*
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||||
* Copyright (c) 2021 STMicroelectronics.
|
||||
* All rights reserved.
|
||||
*
|
||||
* This software is licensed under terms that can be found in the LICENSE file
|
||||
* in the root directory of this software component.
|
||||
* If no LICENSE file comes with this software, it is provided AS-IS.
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||||
*
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||||
******************************************************************************
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||||
*/
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||||
/* Includes */
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#include <sys/stat.h>
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#include <stdlib.h>
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#include <errno.h>
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#include <stdio.h>
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||||
#include <signal.h>
|
||||
#include <time.h>
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||||
#include <sys/time.h>
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||||
#include <sys/times.h>
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||||
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||||
|
||||
/* Variables */
|
||||
extern int __io_putchar(int ch) __attribute__((weak));
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||||
extern int __io_getchar(void) __attribute__((weak));
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||||
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||||
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||||
char *__env[1] = { 0 };
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||||
char **environ = __env;
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||||
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||||
|
||||
/* Functions */
|
||||
void initialise_monitor_handles()
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||||
{
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||||
}
|
||||
|
||||
int _getpid(void)
|
||||
{
|
||||
return 1;
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||||
}
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||||
|
||||
int _kill(int pid, int sig)
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||||
{
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||||
(void)pid;
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||||
(void)sig;
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||||
errno = EINVAL;
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||||
return -1;
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||||
}
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||||
|
||||
void _exit (int status)
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||||
{
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||||
_kill(status, -1);
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||||
while (1) {} /* Make sure we hang here */
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||||
}
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||||
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||||
__attribute__((weak)) int _read(int file, char *ptr, int len)
|
||||
{
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||||
(void)file;
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||||
int DataIdx;
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||||
|
||||
for (DataIdx = 0; DataIdx < len; DataIdx++)
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||||
{
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||||
*ptr++ = __io_getchar();
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||||
}
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||||
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return len;
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||||
}
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||||
|
||||
__attribute__((weak)) int _write(int file, char *ptr, int len)
|
||||
{
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||||
(void)file;
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||||
int DataIdx;
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||||
|
||||
for (DataIdx = 0; DataIdx < len; DataIdx++)
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||||
{
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||||
__io_putchar(*ptr++);
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||||
}
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||||
return len;
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||||
}
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||||
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||||
int _close(int file)
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||||
{
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||||
(void)file;
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||||
return -1;
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||||
}
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||||
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||||
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||||
int _fstat(int file, struct stat *st)
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||||
{
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||||
(void)file;
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||||
st->st_mode = S_IFCHR;
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||||
return 0;
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||||
}
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||||
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||||
int _isatty(int file)
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||||
{
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||||
(void)file;
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||||
return 1;
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||||
}
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||||
|
||||
int _lseek(int file, int ptr, int dir)
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||||
{
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||||
(void)file;
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||||
(void)ptr;
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||||
(void)dir;
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||||
return 0;
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||||
}
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||||
|
||||
int _open(char *path, int flags, ...)
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||||
{
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||||
(void)path;
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||||
(void)flags;
|
||||
/* Pretend like we always fail */
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||||
return -1;
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||||
}
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||||
|
||||
int _wait(int *status)
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||||
{
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||||
(void)status;
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||||
errno = ECHILD;
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||||
return -1;
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||||
}
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||||
|
||||
int _unlink(char *name)
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||||
{
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||||
(void)name;
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||||
errno = ENOENT;
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||||
return -1;
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||||
}
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||||
|
||||
int _times(struct tms *buf)
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||||
{
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||||
(void)buf;
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||||
return -1;
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||||
}
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||||
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||||
int _stat(char *file, struct stat *st)
|
||||
{
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||||
(void)file;
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||||
st->st_mode = S_IFCHR;
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||||
return 0;
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||||
}
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||||
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||||
int _link(char *old, char *new)
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||||
{
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||||
(void)old;
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||||
(void)new;
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||||
errno = EMLINK;
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||||
return -1;
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||||
}
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||||
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||||
int _fork(void)
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||||
{
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||||
errno = EAGAIN;
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||||
return -1;
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||||
}
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||||
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||||
int _execve(char *name, char **argv, char **env)
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||||
{
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||||
(void)name;
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||||
(void)argv;
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||||
(void)env;
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||||
errno = ENOMEM;
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||||
return -1;
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||||
}
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||||
79
STM32CubeIDE/Application/User/Core/sysmem.c
Normal file
79
STM32CubeIDE/Application/User/Core/sysmem.c
Normal file
@@ -0,0 +1,79 @@
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||||
/**
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||||
******************************************************************************
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||||
* @file sysmem.c
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||||
* @author Generated by STM32CubeIDE
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||||
* @brief STM32CubeIDE System Memory calls file
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||||
*
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||||
* For more information about which C functions
|
||||
* need which of these lowlevel functions
|
||||
* please consult the newlib libc manual
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||||
******************************************************************************
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||||
* @attention
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||||
*
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||||
* Copyright (c) 2021 STMicroelectronics.
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||||
* All rights reserved.
|
||||
*
|
||||
* This software is licensed under terms that can be found in the LICENSE file
|
||||
* in the root directory of this software component.
|
||||
* If no LICENSE file comes with this software, it is provided AS-IS.
|
||||
*
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||||
******************************************************************************
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||||
*/
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||||
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||||
/* Includes */
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||||
#include <errno.h>
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||||
#include <stdint.h>
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||||
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||||
/**
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||||
* Pointer to the current high watermark of the heap usage
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||||
*/
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||||
static uint8_t *__sbrk_heap_end = NULL;
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||||
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||||
/**
|
||||
* @brief _sbrk() allocates memory to the newlib heap and is used by malloc
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||||
* and others from the C library
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||||
*
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||||
* @verbatim
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||||
* ############################################################################
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||||
* # .data # .bss # newlib heap # MSP stack #
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||||
* # # # # Reserved by _Min_Stack_Size #
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||||
* ############################################################################
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||||
* ^-- RAM start ^-- _end _estack, RAM end --^
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||||
* @endverbatim
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||||
*
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||||
* This implementation starts allocating at the '_end' linker symbol
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||||
* The '_Min_Stack_Size' linker symbol reserves a memory for the MSP stack
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||||
* The implementation considers '_estack' linker symbol to be RAM end
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||||
* NOTE: If the MSP stack, at any point during execution, grows larger than the
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||||
* reserved size, please increase the '_Min_Stack_Size'.
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*
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||||
* @param incr Memory size
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||||
* @return Pointer to allocated memory
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||||
*/
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void *_sbrk(ptrdiff_t incr)
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||||
{
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||||
extern uint8_t _end; /* Symbol defined in the linker script */
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extern uint8_t _estack; /* Symbol defined in the linker script */
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extern uint32_t _Min_Stack_Size; /* Symbol defined in the linker script */
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const uint32_t stack_limit = (uint32_t)&_estack - (uint32_t)&_Min_Stack_Size;
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const uint8_t *max_heap = (uint8_t *)stack_limit;
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uint8_t *prev_heap_end;
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/* Initialize heap end at first call */
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if (NULL == __sbrk_heap_end)
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{
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__sbrk_heap_end = &_end;
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}
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||||
/* Protect heap from growing into the reserved MSP stack */
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if (__sbrk_heap_end + incr > max_heap)
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{
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errno = ENOMEM;
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return (void *)-1;
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}
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prev_heap_end = __sbrk_heap_end;
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__sbrk_heap_end += incr;
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return (void *)prev_heap_end;
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||||
}
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||||
434
STM32CubeIDE/Application/User/Startup/startup_stm32wl55jcix.s
Normal file
434
STM32CubeIDE/Application/User/Startup/startup_stm32wl55jcix.s
Normal file
@@ -0,0 +1,434 @@
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/**
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||||
******************************************************************************
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||||
* @file startup_stm32wl55xx_cm4.s
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* @author MCD Application Team
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||||
* @brief STM32WL55xx devices Cortex-M4 vector table for GCC toolchain.
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||||
* This module performs:
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* - Set the initial SP
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* - Set the initial PC == Reset_Handler,
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* - Set the vector table entries with the exceptions ISR address,
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* - Branches to main in the C library (which eventually
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* calls main()).
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* After Reset the Cortex-M4 processor is in Thread mode,
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* priority is Privileged, and the Stack is set to Main.
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******************************************************************************
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||||
* @attention
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||||
*
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||||
* Copyright (c) 2020-2021 STMicroelectronics.
|
||||
* All rights reserved.
|
||||
*
|
||||
* This software is licensed under terms that can be found in the LICENSE file
|
||||
* in the root directory of this software component.
|
||||
* If no LICENSE file comes with this software, it is provided AS-IS.
|
||||
*
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||||
******************************************************************************
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||||
*/
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.syntax unified
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.cpu cortex-m4
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.fpu softvfp
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.thumb
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.global g_pfnVectors
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.global Default_Handler
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/* start address for the initialization values of the .data section.
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||||
defined in linker script */
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.word _sidata
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/* start address for the .data section. defined in linker script */
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.word _sdata
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/* end address for the .data section. defined in linker script */
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.word _edata
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/* start address for the .bss section. defined in linker script */
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.word _sbss
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/* end address for the .bss section. defined in linker script */
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.word _ebss
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||||
/**
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||||
* @brief This is the code that gets called when the processor first
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||||
* starts execution following a reset event. Only the absolutely
|
||||
* necessary set is performed, after which the application
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||||
* supplied main() routine is called.
|
||||
* @param None
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||||
* @retval : None
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||||
*/
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||||
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||||
.section .text.Reset_Handler
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.weak Reset_Handler
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.type Reset_Handler, %function
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Reset_Handler:
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ldr r0, =_estack
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mov sp, r0 /* set stack pointer */
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||||
/* Call the clock system initialization function.*/
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||||
bl SystemInit
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||||
|
||||
/* Copy the data segment initializers from flash to SRAM */
|
||||
ldr r0, =_sdata
|
||||
ldr r1, =_edata
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||||
ldr r2, =_sidata
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||||
movs r3, #0
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||||
b LoopCopyDataInit
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||||
|
||||
CopyDataInit:
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||||
ldr r4, [r2, r3]
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||||
str r4, [r0, r3]
|
||||
adds r3, r3, #4
|
||||
|
||||
LoopCopyDataInit:
|
||||
adds r4, r0, r3
|
||||
cmp r4, r1
|
||||
bcc CopyDataInit
|
||||
|
||||
/* Zero fill the bss segment. */
|
||||
ldr r2, =_sbss
|
||||
ldr r4, =_ebss
|
||||
movs r3, #0
|
||||
b LoopFillZerobss
|
||||
|
||||
FillZerobss:
|
||||
str r3, [r2]
|
||||
adds r2, r2, #4
|
||||
|
||||
LoopFillZerobss:
|
||||
cmp r2, r4
|
||||
bcc FillZerobss
|
||||
|
||||
/* Call static constructors */
|
||||
bl __libc_init_array
|
||||
/* Call the application's entry point.*/
|
||||
bl main
|
||||
|
||||
LoopForever:
|
||||
b LoopForever
|
||||
|
||||
.size Reset_Handler, .-Reset_Handler
|
||||
|
||||
/**
|
||||
* @brief This is the code that gets called when the processor receives an
|
||||
* unexpected interrupt. This simply enters an infinite loop, preserving
|
||||
* the system state for examination by a debugger.
|
||||
*
|
||||
* @param None
|
||||
* @retval : None
|
||||
*/
|
||||
.section .text.Default_Handler,"ax",%progbits
|
||||
Default_Handler:
|
||||
Infinite_Loop:
|
||||
b Infinite_Loop
|
||||
.size Default_Handler, .-Default_Handler
|
||||
|
||||
/******************************************************************************
|
||||
*
|
||||
* The STM32WL55xx Cortex-M4 vector table. Note that the proper constructs
|
||||
* must be placed on this to ensure that it ends up at physical address
|
||||
* 0x0000.0000.
|
||||
*
|
||||
******************************************************************************/
|
||||
.section .isr_vector,"a",%progbits
|
||||
.type g_pfnVectors, %object
|
||||
|
||||
g_pfnVectors:
|
||||
.word _estack
|
||||
.word Reset_Handler
|
||||
.word NMI_Handler
|
||||
.word HardFault_Handler
|
||||
.word MemManage_Handler
|
||||
.word BusFault_Handler
|
||||
.word UsageFault_Handler
|
||||
.word 0
|
||||
.word 0
|
||||
.word 0
|
||||
.word 0
|
||||
.word SVC_Handler
|
||||
.word DebugMon_Handler
|
||||
.word 0
|
||||
.word PendSV_Handler
|
||||
.word SysTick_Handler
|
||||
.word WWDG_IRQHandler /* Window Watchdog interrupt */
|
||||
.word PVD_PVM_IRQHandler /* PVD and PVM interrupt through EXTI */
|
||||
.word TAMP_STAMP_LSECSS_SSRU_IRQHandler /* RTC Tamper, RTC TimeStamp, LSECSS and RTC SSRU int.*/
|
||||
.word RTC_WKUP_IRQHandler /* RTC wakeup interrupt through EXTI[19] */
|
||||
.word FLASH_IRQHandler /* Flash memory global interrupt and Flash memory ECC */
|
||||
.word RCC_IRQHandler /* RCC global interrupt */
|
||||
.word EXTI0_IRQHandler /* EXTI line 0 interrupt */
|
||||
.word EXTI1_IRQHandler /* EXTI line 1 interrupt */
|
||||
.word EXTI2_IRQHandler /* EXTI line 2 interrupt */
|
||||
.word EXTI3_IRQHandler /* EXTI line 3 interrupt */
|
||||
.word EXTI4_IRQHandler /* EXTI line 4 interrupt */
|
||||
.word DMA1_Channel1_IRQHandler /* DMA1 channel 1 interrupt */
|
||||
.word DMA1_Channel2_IRQHandler /* DMA1 channel 2 interrupt */
|
||||
.word DMA1_Channel3_IRQHandler /* DMA1 channel 3 interrupt */
|
||||
.word DMA1_Channel4_IRQHandler /* DMA1 channel 4 interrupt */
|
||||
.word DMA1_Channel5_IRQHandler /* DMA1 channel 5 interrupt */
|
||||
.word DMA1_Channel6_IRQHandler /* DMA1 channel 6 interrupt */
|
||||
.word DMA1_Channel7_IRQHandler /* DMA1 channel 7 interrupt */
|
||||
.word ADC_IRQHandler /* ADC interrupt */
|
||||
.word DAC_IRQHandler /* DAC interrupt */
|
||||
.word C2SEV_PWR_C2H_IRQHandler /* CPU M0+ SEV Interrupt */
|
||||
.word COMP_IRQHandler /* COMP1 and COMP2 interrupt through EXTI */
|
||||
.word EXTI9_5_IRQHandler /* EXTI line 9_5 interrupt */
|
||||
.word TIM1_BRK_IRQHandler /* Timer 1 break interrupt */
|
||||
.word TIM1_UP_IRQHandler /* Timer 1 Update */
|
||||
.word TIM1_TRG_COM_IRQHandler /* Timer 1 trigger and communication */
|
||||
.word TIM1_CC_IRQHandler /* Timer 1 capture compare interrupt */
|
||||
.word TIM2_IRQHandler /* TIM2 global interrupt */
|
||||
.word TIM16_IRQHandler /* Timer 16 global interrupt */
|
||||
.word TIM17_IRQHandler /* Timer 17 global interrupt */
|
||||
.word I2C1_EV_IRQHandler /* I2C1 event interrupt */
|
||||
.word I2C1_ER_IRQHandler /* I2C1 event interrupt */
|
||||
.word I2C2_EV_IRQHandler /* I2C2 error interrupt */
|
||||
.word I2C2_ER_IRQHandler /* I2C2 error interrupt */
|
||||
.word SPI1_IRQHandler /* SPI1 global interrupt */
|
||||
.word SPI2_IRQHandler /* SPI2 global interrupt */
|
||||
.word USART1_IRQHandler /* USART1 global interrupt */
|
||||
.word USART2_IRQHandler /* USART2 global interrupt */
|
||||
.word LPUART1_IRQHandler /* LPUART1 global interrupt */
|
||||
.word LPTIM1_IRQHandler /* LPtimer 1 global interrupt */
|
||||
.word LPTIM2_IRQHandler /* LPtimer 2 global interrupt */
|
||||
.word EXTI15_10_IRQHandler /* EXTI line 15_10] interrupt through EXTI */
|
||||
.word RTC_Alarm_IRQHandler /* RTC Alarms A & B interrupt */
|
||||
.word LPTIM3_IRQHandler /* LPtimer 3 global interrupt */
|
||||
.word SUBGHZSPI_IRQHandler /* SUBGHZSPI global interrupt */
|
||||
.word IPCC_C1_RX_IRQHandler /* IPCC CPU1 RX occupied interrupt */
|
||||
.word IPCC_C1_TX_IRQHandler /* IPCC CPU1 RX free interrupt */
|
||||
.word HSEM_IRQHandler /* Semaphore interrupt 0 to CPU1 */
|
||||
.word I2C3_EV_IRQHandler /* I2C3 event interrupt */
|
||||
.word I2C3_ER_IRQHandler /* I2C3 error interrupt */
|
||||
.word SUBGHZ_Radio_IRQHandler /* Radio IRQs RFBUSY interrupt through EXTI */
|
||||
.word AES_IRQHandler /* AES global interrupt */
|
||||
.word RNG_IRQHandler /* RNG interrupt */
|
||||
.word PKA_IRQHandler /* PKA interrupt */
|
||||
.word DMA2_Channel1_IRQHandler /* DMA2 channel 1 interrupt */
|
||||
.word DMA2_Channel2_IRQHandler /* DMA2 channel 2 interrupt */
|
||||
.word DMA2_Channel3_IRQHandler /* DMA2 channel 3 interrupt */
|
||||
.word DMA2_Channel4_IRQHandler /* DMA2 channel 4 interrupt */
|
||||
.word DMA2_Channel5_IRQHandler /* DMA2 channel 5 interrupt */
|
||||
.word DMA2_Channel6_IRQHandler /* DMA2 channel 6 interrupt */
|
||||
.word DMA2_Channel7_IRQHandler /* DMA2 channel 7 interrupt */
|
||||
.word DMAMUX1_OVR_IRQHandler /* DMAMUX overrun interrupt */
|
||||
|
||||
.size g_pfnVectors, .-g_pfnVectors
|
||||
|
||||
/*******************************************************************************
|
||||
*
|
||||
* Provide weak aliases for each Exception handler to the Default_Handler.
|
||||
* As they are weak aliases, any function with the same name will override
|
||||
* this definition.
|
||||
*
|
||||
*******************************************************************************/
|
||||
|
||||
.weak NMI_Handler
|
||||
.thumb_set NMI_Handler,Default_Handler
|
||||
|
||||
.weak HardFault_Handler
|
||||
.thumb_set HardFault_Handler,Default_Handler
|
||||
|
||||
.weak MemManage_Handler
|
||||
.thumb_set MemManage_Handler,Default_Handler
|
||||
|
||||
.weak BusFault_Handler
|
||||
.thumb_set BusFault_Handler,Default_Handler
|
||||
|
||||
.weak UsageFault_Handler
|
||||
.thumb_set UsageFault_Handler,Default_Handler
|
||||
|
||||
.weak SVC_Handler
|
||||
.thumb_set SVC_Handler,Default_Handler
|
||||
|
||||
.weak DebugMon_Handler
|
||||
.thumb_set DebugMon_Handler,Default_Handler
|
||||
|
||||
.weak PendSV_Handler
|
||||
.thumb_set PendSV_Handler,Default_Handler
|
||||
|
||||
.weak SysTick_Handler
|
||||
.thumb_set SysTick_Handler,Default_Handler
|
||||
|
||||
.weak WWDG_IRQHandler
|
||||
.thumb_set WWDG_IRQHandler,Default_Handler
|
||||
|
||||
.weak PVD_PVM_IRQHandler
|
||||
.thumb_set PVD_PVM_IRQHandler,Default_Handler
|
||||
|
||||
.weak TAMP_STAMP_LSECSS_SSRU_IRQHandler
|
||||
.thumb_set TAMP_STAMP_LSECSS_SSRU_IRQHandler,Default_Handler
|
||||
|
||||
.weak RTC_WKUP_IRQHandler
|
||||
.thumb_set RTC_WKUP_IRQHandler,Default_Handler
|
||||
|
||||
.weak FLASH_IRQHandler
|
||||
.thumb_set FLASH_IRQHandler,Default_Handler
|
||||
|
||||
.weak RCC_IRQHandler
|
||||
.thumb_set RCC_IRQHandler,Default_Handler
|
||||
|
||||
.weak EXTI0_IRQHandler
|
||||
.thumb_set EXTI0_IRQHandler,Default_Handler
|
||||
|
||||
.weak EXTI1_IRQHandler
|
||||
.thumb_set EXTI1_IRQHandler,Default_Handler
|
||||
|
||||
.weak EXTI2_IRQHandler
|
||||
.thumb_set EXTI2_IRQHandler,Default_Handler
|
||||
|
||||
.weak EXTI3_IRQHandler
|
||||
.thumb_set EXTI3_IRQHandler,Default_Handler
|
||||
|
||||
.weak EXTI4_IRQHandler
|
||||
.thumb_set EXTI4_IRQHandler,Default_Handler
|
||||
|
||||
.weak DMA1_Channel1_IRQHandler
|
||||
.thumb_set DMA1_Channel1_IRQHandler,Default_Handler
|
||||
|
||||
.weak DMA1_Channel2_IRQHandler
|
||||
.thumb_set DMA1_Channel2_IRQHandler,Default_Handler
|
||||
|
||||
.weak DMA1_Channel3_IRQHandler
|
||||
.thumb_set DMA1_Channel3_IRQHandler,Default_Handler
|
||||
|
||||
.weak DMA1_Channel4_IRQHandler
|
||||
.thumb_set DMA1_Channel4_IRQHandler,Default_Handler
|
||||
|
||||
.weak DMA1_Channel5_IRQHandler
|
||||
.thumb_set DMA1_Channel5_IRQHandler,Default_Handler
|
||||
|
||||
.weak DMA1_Channel6_IRQHandler
|
||||
.thumb_set DMA1_Channel6_IRQHandler,Default_Handler
|
||||
|
||||
.weak DMA1_Channel7_IRQHandler
|
||||
.thumb_set DMA1_Channel7_IRQHandler,Default_Handler
|
||||
|
||||
.weak ADC_IRQHandler
|
||||
.thumb_set ADC_IRQHandler,Default_Handler
|
||||
|
||||
.weak DAC_IRQHandler
|
||||
.thumb_set DAC_IRQHandler,Default_Handler
|
||||
|
||||
.weak C2SEV_PWR_C2H_IRQHandler
|
||||
.thumb_set C2SEV_PWR_C2H_IRQHandler,Default_Handler
|
||||
|
||||
.weak COMP_IRQHandler
|
||||
.thumb_set COMP_IRQHandler,Default_Handler
|
||||
|
||||
.weak EXTI9_5_IRQHandler
|
||||
.thumb_set EXTI9_5_IRQHandler,Default_Handler
|
||||
|
||||
.weak TIM1_BRK_IRQHandler
|
||||
.thumb_set TIM1_BRK_IRQHandler,Default_Handler
|
||||
|
||||
.weak TIM1_UP_IRQHandler
|
||||
.thumb_set TIM1_UP_IRQHandler,Default_Handler
|
||||
|
||||
.weak TIM1_TRG_COM_IRQHandler
|
||||
.thumb_set TIM1_TRG_COM_IRQHandler,Default_Handler
|
||||
|
||||
.weak TIM1_CC_IRQHandler
|
||||
.thumb_set TIM1_CC_IRQHandler,Default_Handler
|
||||
|
||||
.weak TIM2_IRQHandler
|
||||
.thumb_set TIM2_IRQHandler,Default_Handler
|
||||
|
||||
.weak TIM16_IRQHandler
|
||||
.thumb_set TIM16_IRQHandler,Default_Handler
|
||||
|
||||
.weak TIM17_IRQHandler
|
||||
.thumb_set TIM17_IRQHandler,Default_Handler
|
||||
|
||||
.weak I2C1_EV_IRQHandler
|
||||
.thumb_set I2C1_EV_IRQHandler,Default_Handler
|
||||
|
||||
.weak I2C1_ER_IRQHandler
|
||||
.thumb_set I2C1_ER_IRQHandler,Default_Handler
|
||||
|
||||
.weak I2C2_EV_IRQHandler
|
||||
.thumb_set I2C2_EV_IRQHandler,Default_Handler
|
||||
|
||||
.weak I2C2_ER_IRQHandler
|
||||
.thumb_set I2C2_ER_IRQHandler,Default_Handler
|
||||
|
||||
.weak SPI1_IRQHandler
|
||||
.thumb_set SPI1_IRQHandler,Default_Handler
|
||||
|
||||
.weak SPI2_IRQHandler
|
||||
.thumb_set SPI2_IRQHandler,Default_Handler
|
||||
|
||||
.weak USART1_IRQHandler
|
||||
.thumb_set USART1_IRQHandler,Default_Handler
|
||||
|
||||
.weak USART2_IRQHandler
|
||||
.thumb_set USART2_IRQHandler,Default_Handler
|
||||
|
||||
.weak LPUART1_IRQHandler
|
||||
.thumb_set LPUART1_IRQHandler,Default_Handler
|
||||
|
||||
.weak LPTIM1_IRQHandler
|
||||
.thumb_set LPTIM1_IRQHandler,Default_Handler
|
||||
|
||||
.weak LPTIM2_IRQHandler
|
||||
.thumb_set LPTIM2_IRQHandler,Default_Handler
|
||||
|
||||
.weak EXTI15_10_IRQHandler
|
||||
.thumb_set EXTI15_10_IRQHandler,Default_Handler
|
||||
|
||||
.weak RTC_Alarm_IRQHandler
|
||||
.thumb_set RTC_Alarm_IRQHandler,Default_Handler
|
||||
|
||||
.weak LPTIM3_IRQHandler
|
||||
.thumb_set LPTIM3_IRQHandler,Default_Handler
|
||||
|
||||
.weak SUBGHZSPI_IRQHandler
|
||||
.thumb_set SUBGHZSPI_IRQHandler,Default_Handler
|
||||
|
||||
.weak IPCC_C1_RX_IRQHandler
|
||||
.thumb_set IPCC_C1_RX_IRQHandler,Default_Handler
|
||||
|
||||
.weak IPCC_C1_TX_IRQHandler
|
||||
.thumb_set IPCC_C1_TX_IRQHandler,Default_Handler
|
||||
|
||||
.weak HSEM_IRQHandler
|
||||
.thumb_set HSEM_IRQHandler,Default_Handler
|
||||
|
||||
.weak I2C3_EV_IRQHandler
|
||||
.thumb_set I2C3_EV_IRQHandler,Default_Handler
|
||||
|
||||
.weak I2C3_ER_IRQHandler
|
||||
.thumb_set I2C3_ER_IRQHandler,Default_Handler
|
||||
|
||||
.weak SUBGHZ_Radio_IRQHandler
|
||||
.thumb_set SUBGHZ_Radio_IRQHandler,Default_Handler
|
||||
|
||||
.weak AES_IRQHandler
|
||||
.thumb_set AES_IRQHandler,Default_Handler
|
||||
|
||||
.weak RNG_IRQHandler
|
||||
.thumb_set RNG_IRQHandler,Default_Handler
|
||||
|
||||
.weak PKA_IRQHandler
|
||||
.thumb_set PKA_IRQHandler,Default_Handler
|
||||
|
||||
.weak DMA2_Channel1_IRQHandler
|
||||
.thumb_set DMA2_Channel1_IRQHandler,Default_Handler
|
||||
|
||||
.weak DMA2_Channel2_IRQHandler
|
||||
.thumb_set DMA2_Channel2_IRQHandler,Default_Handler
|
||||
|
||||
.weak DMA2_Channel3_IRQHandler
|
||||
.thumb_set DMA2_Channel3_IRQHandler,Default_Handler
|
||||
|
||||
.weak DMA2_Channel4_IRQHandler
|
||||
.thumb_set DMA2_Channel4_IRQHandler,Default_Handler
|
||||
|
||||
.weak DMA2_Channel5_IRQHandler
|
||||
.thumb_set DMA2_Channel5_IRQHandler,Default_Handler
|
||||
|
||||
.weak DMA2_Channel6_IRQHandler
|
||||
.thumb_set DMA2_Channel6_IRQHandler,Default_Handler
|
||||
|
||||
.weak DMA2_Channel7_IRQHandler
|
||||
.thumb_set DMA2_Channel7_IRQHandler,Default_Handler
|
||||
|
||||
.weak DMAMUX1_OVR_IRQHandler
|
||||
.thumb_set DMAMUX1_OVR_IRQHandler,Default_Handler
|
||||
|
||||
.weak SystemInit
|
||||
Reference in New Issue
Block a user